i've looked at a lot of branchless sort implementations and the pattern is usually the same. the compiler can vectorize the inner loop, which is where most of the speedup comes from. modern x86 branch predictors are already good enough that mispredictions aren't the bottleneck in most cases. what matters more is whether the speedup holds on random input vs nearly-sorted, because the memory access pattern changes completely. on arm the gap can be dramatic since the branch predictor architecture is different. i'd like to see numbers on both.