While the change in power-draw looks nearly instantaneous outside the chip, it is absolutely not instantaneous internally. On modern superscalar CPUs like Intel Core or AMD Ryzen, the on-chip power-regulation is done via one or more tiny on-chip microcontrollers that are dedicated to power-management. When a workload suddenly changes -- e.g. switching on multiple blocks in the vector unit -- the power-management ucontroller sees these blocks being switched on and immediately starts pre-charging the supply lines from the on-chip regulator. This ucontroller is running at core frequency, so it's running hundreds of times faster than any external clocks. The on-chip regulator handles the short-term power needs while waiting for the external VRM to respond. While waiting for power to arrive, work can continue, you just can't pump it at full frequency. So, there will be a holdoff (reduced frequency in that block) until power arrives, then the frequency of the unit is shifted up to full frequency. I haven't written code for these PM ucontrollers so this is a very hand-wavey description -- they use lots of black-magic tricks to keep everything working smoothly while power-gates are continually switching on and off all over the chip.