I wouldn't say it's incompetence in skill for Intel's engineers.

It's at least ignorant to refuse to learn from failures and still trying to things. From the outside it pretty much looks like incompetence for everyone else, since it's a phenomenon which people usually call "being stupid".

They took way too many risks with 10nm. COAG, 36nm half-pitch and cobalt interconnects are much too aggressive to shoot for in the same node.

Without doubt, yes! Though all these high-faluting and completely overblown ambitions on 10nm with sheer bombastic metrics (mindlessly throwing every damn thing into the mix, their labs ever came up with), where in good part due to Intel trying to make timely amends in the first place, SINCE they tried to compensate for all the delays and time lost on the processes which lead up to 10nm, to recoup already lost time up until then to begin with.

You see their circular reasoning on all their (over-) ambitions at play in all of this?!

Cobalt was considered, because it had better leakage characteristics than copper at smaller process nodes. Cobalt ruined yields because it was so brittle, even changing temperatures and small vibrations were enough to cause cracks in the interconnects.

That's why Cannon Lake was "HVM" but only landed on ONE CPU while having piss-poor yields. Intel eventually saved the node by developing a cobalt-copper alloy for the vias, this was used in the Intel 7 and 7 Ultra variants in Alder and Raptor Lake. Contact over Active Gate took a long time to perfect, but Intel managed to do that with Intel-4.

Yes, and Intel should've ditched ALL of everything advanced, throw every fancy stuff overboard (which was initially planned to be incorporated into 10nm), and just go for a respectively scaled 10nm-process on damn copper.

Putting everything Contact Over Active Gate and their Cobalt'nStuff, and put it on the back-burner alongside a plain well-tried copper-based 10nm – Saving their face and sit-upon in the process, while working on figuring things out on their originally planned 10nm in the backyard, when copper 10nm was running the show on front yard.

It took 3 years for Intel to develop a solution to cobalt.

Another proof of their ignorance and reason forwhy Intel should've already put a copper-based 10nm-variant in place by 2015, when it was clear to see for everyone involved, that it was impossible to make it work of a 2015-launch.

Intel ditched the cobalt vias idea with Intel-4, and they switched back to copper vias with cobalt tips.

Yes, they refused to let go of cobalt, tried to make it work for 3 years, only to abandon it afterwards …

When it turned out, that … it didn't work! — A brilliant achievement of a sane mind, obviously.

Intel eventually developed "subtractive ruthenium" vias to replace copper, which improved capacitance by 25% with half-pitch sizes below or equal to 25nm. It was presented at IDEM 2024, not sure when it will be used.

… which should've been the original v1.0 10nm-process in the backyard to be made at, eventually replacing their (by then already) long-running copper-based 10nm-variant, yes.

Intel's foundry team is executing well in R and D (Components Research), but they're having trouble bringing a viable product to market.

Any kind of efforts on research and development, are mostly moot, if they're basically unusable in praxi.