Thanks for sharing this, really interesting.

It' really interesting to see AMD's software improvements across AMDVLK releases. Using a 7900 GRE starting from 2024.Q3 to 2025.Q1 there was a \~55% reduction in BLAS size, though it does seem any remaining gains for RDNA2/3 are going to be limited.

What's also interesting to note, while the theoretical BLAS sizes for each driver aren't that wildly different from the measured values, with changes to RDNA4 what is expected to be 9.2 bytes/triangle in theory is actually \~48 bytes/triangle measured. Kapoulkine does discuss further as to why, but perhaps like with AMDVLK driver releases showing improvement, perhaps over time we can see some improvements taking advantage of RDNA4.

Another thing I found interesting is that Xe2 (B580) and RDNA4 (9070 XT) does not seem far off in RT acceleration (47.9 vs 45 bytes/triangle). Hoping Kapoulkine may be interested in doing a writeup for Intel as well:

I could have studied Intel GPUs more, as they do have an open source driver as part of Mesa; however, it’s unclear if their proprietary driver shares the same source, and in general I just was more interested in AMD when investigating this.