Intel Titan Lake Rumored for All P-Cores, Hammer Lake to Return Hyper-Threading
Posted by Geddagod@reddit | hardware | View on Reddit | 103 comments
Posted by Geddagod@reddit | hardware | View on Reddit | 103 comments
Geddagod@reddit (OP)
Pretty interesting leak from the foundry perspective too:
I_ATE_RADAR@reddit
They are bringing back significant chunk of tiles back to IFS, like almost every PCD die is on Intel 3, SOC tile on 18ap. No wonder they are buying back fab34.
Now the most interesting part will be coral rapids. It will have SMT for sure but none of RZL and TTL stuff has SMT. Hard to guess what it will look like.
Exist50@reddit
For COR, it would have to be a GFC derivative of some sort, right? Seems too early for UC.
CopperSharkk@reddit
JNC??
https://www.linkedin.com/posts/orly-cohen-6a7bb422_myintelstory-iamintel-activity-7429959385763868672-1vwa?utm_source=share&utm_medium=member_desktop&rcm=ACoAAFX_IEcBssa-wnpbWSwrK7HWO0BiZSJdnoY
Exist50@reddit
Oh, that's an interesting link indeed. Seems plausible, if nothing else.
Always funny what you can find on LinkedIn that just passes completely under the radar. Fun fact, the Intel-Ericsson Intel 3 chip was posted on LinkedIn by one of their execs months before being formally announced, and I even cheekily reposted the picture on the Anandtech forums without including the context of who/what it was. Drove some people crazy.
thegammaray@reddit
Over on Substack, Alex_Intel_ speculates that COR will use CSK and that CSK is the UC because nothing in the client roadmap shows a GFC core on an Intel node, whereas CSK is on 18A-U already and Tan's stated goal of pulling in COR doesn't fit with 14A's rollout but fits with 18A-U, as SemiAnalysis pointed out earlier this year.
Exist50@reddit
For that to happen, CSK would have to be ready more or less around the same time as GFC, given the extra lead time for server parts, unless COR shortens that timeline by being a simple iteration on DMR. It would also need SMT, which we've seen no sign of. I certainly wouldn't call it impossible, though I'd still lean towards them using a GFC derivative. The lack of 18A client chips could even be explained by them diverting those PD resources to an optimized server variant.
Dangerman1337@reddit
511 on Anandtech mentioned that that Coral is GF 18A-U with SMT which makes sense.
Exist50@reddit
Yeah, I think that's the most likely outcome at this point. Any other combo just seems to high risk.
SlamedCards@reddit
Video of the leaker mentions titan lake might have SMT
Exist50@reddit
MLID? I just straight up ignore his commentary. He just makes shit up. The slides, however, are almost certainly real.
Exist50@reddit
MLID? I just straight up ignore his commentary. He just makes shit up. The slides, however, are almost certainly real.
Geddagod@reddit (OP)
Semianalysis did point that out, however it's under the paywalled section from your link.
Luckily someone leaked the paywall section online lol so one can confirm that they think coral rapids was pulled onto 18A.
kingwhocares@reddit
JunosArmpits@reddit
Very interesting. How will the feature set of such an iGPU compare to a dedicated one I wonder
kingwhocares@reddit
Probably the Nvidia top end for laptop like how the 5090 laptop version is similar to the RTX 5080 desktop version in die size.
SlamedCards@reddit
Doesn't the leak show all the 32 Xe is 18AP?
Geddagod@reddit (OP)
No, it shows the 32 EU part as being on 18A, which is not high end.
You can also tell it's not high end because it's being glued onto all the RZL-S parts, which don't need large iGPUs.
SlamedCards@reddit
Is the EU not the same as Xe cores?
sussy_ball@reddit
A Xe core has 16 EU. and yes the AX ones will presumably have 32 Xe cores
PastaPandaSimon@reddit
It's interesting in that someone got a good incentive to leak very recent materials.
Dangerman1337@reddit
I think 14A is interesting because it contradicts what LBT said very recently about risk production but that could just mean 14A-P than the base 14A node.
Exist50@reddit
Seems to be little more than a pipe cleaner for the fab. If it works, great, but they can just not ship it, and would do almost nothing to the overall lineup.
Geddagod@reddit (OP)
Intel's messaging about 14A is all over the place. It's HVM in 28 for internal, for external 29', but then LBT recently said:
So who knows. I think the 2+0 RZL part supports the 2028 HVM internally stance, but I understand why LBT is being so wishy-washy about 14A HVM then, if that one tiny CPU die is all that would be produced in 2028.
And by 2+0, I mean just the CPU tile is on 14A. That 2+0 also has a separate SOC and IO tile on other nodes apparently.
Scary-Jaguar-9072@reddit
Not even LBT knows. They have plans im sure but its been a decade since Intel actually stayed on plan.
Dangerman1337@reddit
I can see Late 2027 being risk production for 14A for 2+0 tiles to test things out and then 14A-P Risk production to do similar with maybe Moon Lake and then 14A-P becomes mass production internally and externally is my guess.
Geddagod@reddit (OP)
MLID yes, but the slides seem real enough, and other leakers have confirmed the slides are real.
Plus, they have a wealth of information that I doubt MLID has the knowledge to fake, even if he wanted too, such as the internal node names (their old naming scheme of p1278, p1276.5, etc etc).
Pretty interesting slides though, and it seems like Intel won't have another unified (desktop and mobile) client generation till hammer lake after nova lake, 3 years later.
lintstah1337@reddit
The same guy that said zen is going to bring 30% IPC improvement, then proceed to delete the videos when he got it wrong.
f3n2x@reddit
The guy has no idea what he's talking about definitely has some good sources. Just disregard anything he himself deducts, predicts or derives from his leaks.
Seanspeed@reddit
Regard 95% of his 'leaks' as well, though. Unless he shows actual documents, then he's usually always making those up as well.
f3n2x@reddit
I genuinely don't think he does. Sometimes he misrepresents the info because he doesn't understand it well enough. Also very early leaks sometimes just change down the road as things progress.
Exist50@reddit
In many cases, there's no shred of legitimate info to begin with. And if he actually had standards, why delete his past videos? Doubly so if you insist they were still directionally correct.
SagittaryX@reddit
I mean not that this is the reason (pure speculation), but I can see someone deleting videos like that just to avoid harassment. The internet is a cesspool, he's a leaker he's bound to get stuff wrong, why take all that unnecessary flak for it?
Seanspeed@reddit
Why are some of you willing to go to bat for such an obvious scumbag like this?
SagittaryX@reddit
I’m not sure how that’s going to bat for him. I’m mentioning a valid (imo) alternative reasoning why one might remove videos that will draw abuse.
Seanspeed@reddit
This is insanely naive. His 'very early' leaks are so off the wall wrong that there's no way there's just 'changed plans'. Come on now, literally anybody making shit up could be explained away as 'things changed', it's far, far too convenient.
Also realize this isn't some 'tech guy' who just occasionally has leaks. Leaks are his whole thing. His whole Youtube career is based on it entirely. And so it's kind of crazy he ALWAYS has constant leaks, every week, huh? Also very convenient. Yet unless he shows documentation, they're always either wrong, or just regurgitated from an existing leak elsewhere, or something plain old easily guessable by anybody half informed.
And just listen to the way the guy talks, ffs. He'll regularly say things like "This is from one of my most trusted sources". This dude is a 100%, bonafide bullshitter. And it's depressing how people cannot recognize such an obvious one staring them in the face, after having been so ridiculously wrong on so many things all these years. smh
nanonan@reddit
He doesn't have the ability to distinguish a bullshit leak from a factual one, so you need to do that yourself. You should start by assuming bullshit.
stuff7@reddit
hmmm
look i get he might not be a great analysis. for example he said there would be 32gb vram rdna4 gpu and thinks its for gaming.
yes it exist during testing and validation in AMD but what that product becomes in the market is not up to the engineers working there, who probably was the one who leaked it, it eventually ended up as Radeon AI PRO R9700.
the issue is people on reddit doesn't want to use any form of critical thinking and screeches when things doesn't turn up the way they thought.
and when RDNA5 were to use LPDDR for its vram, zen 6 having 12 cores per compute die were to become true base on his leaks, no doubt redditors will still harp over past failures in analysis.
Seanspeed@reddit
So what about when Zen 4 would have a 25% IPC increase? Just a change of plans in AMD, right? They suddenly decided, "Nah, we dont want to have a 25% IPC increase, let's go with 8%". Totally plausible. Totally just us not using our 'critical thinking' instead of seeing this guy for the obvious bullshitter he is. The irony.
SignalButterscotch73@reddit
I actually give him a pass for this one. In AVX512 testing zen5 is around 30% better than zen4.
He was wrong and not at the same time.
Exist50@reddit
That's not what he claimed though. No need to sugar coat it.
SignalButterscotch73@reddit
He claimed with full confidence that it would be 30% better than zen4, making me think he was told 30% by a source without the specific mention of AVX512 and all the rest was his bs.
In one specific area it is 30% better, that's undisputable.
Seanspeed@reddit
That's just a lucky coincidence, and not even all that lucky given how widely IPC can change per workload. By that measure, you can pretty much always 'be right' about an IPC increase, since there might well be like ONE workload you can find that roughly matches it.
He clearly made that shit up man, come on now. He did the same shit for Zen 4 where he said it would be a 25% minimum IPC increase originally. Then 'revised' it down to 20% later, pretending he never said 25%+ before. Then in reality it was only 8%. lol
He's done all this shit soooo many times. His RDNA3 leaks were bonkers ridiculous, for example.
Exist50@reddit
Or he just made it all up. It's hardly the only example.
Geddagod@reddit (OP)
Was that MLID? Thought kepler/spec was the Zen 5 40% hype train group lol.
stuff7@reddit
somehow reddit still trust him? curious how the standards that MLID was held to wasn't being held to these other "more trusted" leakers
Geddagod@reddit (OP)
I'm not too surprised, kepler is, frankly, much more likable than MLID lol.
Extreme-Arm4609@reddit
I don't think MLID fakes things himself I think that he has in the past and maybe sometimes now gets bad information from well the people who leak things to him
Dangerman1337@reddit
I think he's improved recently.
stuff7@reddit
Redditors such as exist50 still harping on the past lol.
Seanspeed@reddit
He doesn't fake documents like this, but he ALWAYS shows receipts when he has a genuine leak. Anytime he's just spouting shit with no receipts, he's almost assuredly just making shit up. Nobody, and I mean nobody can reliably have 'exclusive' major info constantly from all these major companies like you'd have to believe from his constant videos.
And no, it's not bad information when he's just spouting shit, it's just straight up him making shit up. You can tell because it's always got the same kind of hallmarks of somebody who only kinda understands this stuff.
Extreme-Arm4609@reddit
Damn did he call your wife a whore or something bro calm the fuck down.
Dangerman1337@reddit
It's an absolutely insane leak. Wonder how old or new it is.
Psyclist80@reddit
So AMD will continue to dominate until 2029 by the sounds of it. Glad Intel is pulling its head out its arse all the same, we need competition in the CPU space.
UsernameIsTaken45@reddit
Why leave hyper threading in the first place?
pianobench007@reddit
https://youtu.be/EJGr-HWzGFs?si=Z6hS47pKi9_XvWRo&t=1440
Could be a trade-off equation. SMT has advantage and disadvantages. Advantage is better core utilization in multi task workload. Disadvantage is SMT will take away from some single thread performance.
This is from an Intel engineer's interview. I think it makes sense.
True-Environment-237@reddit
SMT also is responsible for most vulnerabilities which decrease performance when patched and make serious customers really unhappy to lose performance overnight.
Verite_Rendition@reddit
I am surprised to see this comment so far down.
The security implications of SMT are one of the major reasons it was removed. SMT was responsible for several Spectre-class speculative execution side-channel attacks. This is because it's easier to snoop on a CPU core and get it to do weird things to expose information about the results of speculative execution when you can run another thread alongside the target, rather than having to context switch between them.
Ensuring that no two threads simultaneously share a core is one of the ways to reduce the surface area for Spectre attacks.
pianobench007@reddit
Agreed. Ori (the senior intel engineer) explained it better than I could. Ive listened to his talk a couple of times to catch more insight. And yes he goes over the maintenance needs of keeping SMT around.
TLDW version is SMT is still very important in datacenter. TOC (total operating cost) depends on thread density per area.
But when he talks about client, it now makes a ton more sense why SMT can be removed. You already give the user 8P 16E cores for 24 cores (plenty of threads for multithread use) and now they optimize single core performance per area. With SMT removed you also have ease of maintenance. With SMT On you have to do a bunch of housekeeping as you mention. Cleaning up memory in order to prevent vulnerabilities is extra work and robs performance.
Now I am ranting. I think Ori said it the best and it is worth listening a few times to understand all his points. So many good points on why client is better off with ST only cores.
Artoriuz@reddit
A single thread per core is "cleaner" from a design perspective.
SMT is kind of a "hack" to help with hardware utilisation when you can't saturate the core with a single execution thread. If you can keep the core fed without it, then you don't necessarily need it. Apple, ARM and Qualcomm seem to do fine without it.
PastaPandaSimon@reddit
You can make a slightly wider core by not including HT wiring also. So there is a trade off where you're making a less powerful core than you could, just to include HT. You may be trading a low single digit % ST performance for low double digit MT performance, and MT performance is far less often the bottleneck in consumer workloads.
virtualmnemonic@reddit
The 2500k and 2600k traded blows in many games at first, but the 2600k significantly outperformed overtime as games and software began to use more threads.
Even if it may be worth it today to remove SMT to squeeze a few extra points on single threaded tasks, the large gain in MT will compensate in time.
Zestyclose_Plum_8096@reddit
IBM are the worst CPU designers in the world hey?
The correct answer is it comes down to what workloads you are targeting
Contrary to the above comment SMT is great for workloads with high latencies , like DB with complex SQL ( thus the reason toIBM choice).
An interesting counter example is now because memory is so expensive running without SMT is often preferred because it's more memory efficient at scale for a give throughput/ transaction count. These are workloads 2 years ago you would run with SMT.
Exist50@reddit
Well, Nvidia seems to have gotten good results adding it to their ARM core. Maybe a reflection of the specific markets. Afaik, a big driver of SMT in the x86 ecosystem is per-core licensing for enterprise software, stupid as that might seem.
DerpSenpai@reddit
Yes, some automotive clients like it but mind you, Nvidia implemented spacial multi threading. Not the same thing AMD and Intel do
Exist50@reddit
Eh, potato potahto. Technical details vary between all three, but the overarching tradeoffs are the same.
klipseracer@reddit
Tamater, without the Ta
nanonan@reddit
Pushing higher clocks, without which the loss of performance from Raptor Lake to its successors would have been even worse.
Dstln@reddit
A lot of security vulnerabilities for a while
f3n2x@reddit
Because it's a scheduling nightmare when you have some cores with SMT, some cores without SMT, each with different performance characteristics, and the more E cores you have the smaller the relative advantage of SMT becomes. If SMT is only active/useful above 20 threads and a fully threaded workload only nets you a total +8% or so instead of +30% you get on a pure P core design you might just say fuck it and leave it out.
Also some workloads disable SMT for security reasons anyway even if there are no known vulnerabilities at the time.
Exist50@reddit
That much, at least, is something they already dealt with. Not really a major problem. You can just assign the SMT threads as lowest priority, maybe higher than LP E-cores. But yes, the relative benefit is greatly diminished in hybrid systems if the small cores doesn't support the same.
f3n2x@reddit
That's only a partial solution. If you have one critial thread on a P core and run out of free cores the best solution could be to migrate the critial thread from P to E and have two non-critical threads on the P.
P>E>SMT priority is usually pretty decent but SMT is already a fringe feature which can potentially lower performance if scheduling isn't done right.
Exist50@reddit
You'd could also simply leave the critical process pinned to the P core and context switch the low priority threads.
Uptons_BJs@reddit
It took up die area, and if you have a bunch of E cores, you might not need it at all?
But if there’s no more e cores, I can see bringing it back
Warm-Cartographer@reddit
It's All E cores, new P cores will be older E cores.
Exist50@reddit
They use the E-core uarch as a baseline, but are going to have to scale it up to become the new P-core.
Geddagod@reddit (OP)
SMT in Zen 5 costs like 5% in area according to AMD
Looks like there will still be dense cores though
Server doesn't have hybrid skus.
And if you need SMT in servers anyway, why not use the same core IP in client too?
Exist50@reddit
Made it easier to get LNC shipping (big rewrite), and less valuable if you have a separate E-core that is much better in MT PPA. At this point it's primarily a server feature, and Intel thought any server where you'd really want the extra MT perf would be better served by Atom.
hardware-ModTeam@reddit
Thank you for your submission! Unfortunately, your submission has been removed for the following reason:
Rumours or other claims/information not directly from official sources must have evidence to support them. Any rumor or claim that is just a statement from an unknown source containing no supporting evidence will be removed.
IANVS@reddit
Ok, as a layman, is Nova Lake going to be worth waiting or not?
Exist50@reddit
Both NVL and Zen 6 are shaping up to be the biggest jumps we've seen in a while.
Dangerman1337@reddit
But releasing at the worst time possible. I think RZL and Zen 7 will be better timed.
Exist50@reddit
Might be nice for people already on DDR5 platforms, however. I'm eyeing an upgrade from RPL, so I'll just reuse my existing memory, and if higher RAM prices force the CPU vendors to compensate on their end...
PastaPandaSimon@reddit
Looking at the roadmap, I think Intel is making a lot of good bets. How they execute them is to be seen, but with Nova Lake you are buying the same platform that will also support the culmination of their unified core project, which is the biggest design effort at Intel at the moment. Especially Hammer Lake in 2029 will be all unified lake desktop chips, with no more P-core/E-core split, and they'll be drop in replacements for Nova Lake CPUs.
IANVS@reddit
Oh, you think they'll share the same socket? Intel did mention "improved longevity" of their new platforms but nothing specific...
greggm2000@reddit
Ultimately, you'll have to wait for independent testing/benchmarks to answer that. Same with Zen 6. Now, if I had to guess, then yes, it will be, what with the greatly increased cache.. but ofc Intel could mess things up in practice, so who knows?
We'll know in less than a year. Probably.
Seanspeed@reddit
We just dont know. There's definitely reasons to be quite optimistic, but there was similarly reason to be pretty optimistic of Arrow Lake beforehand, too. The P-core team just has not done good work since Golden Cove/Alder Lake, and I dont think their messy tile strategy has really done them any favors.
mca1169@reddit
I can't wait for intel to give up it's hybrid architecture and go back to normal high performance hyperthreaded cores. then they can actually compete against AMD again.
CopperSharkk@reddit
Why the hell are they bothering making a 4+8 RZL for TTL-B when they can use the TTL cpu itself. That doesn't make sense lol.
Exist50@reddit
Possible that the combination of node + 1st gen UC makes it underperform RZL? These are the "premium" parts, after all. Would make sense for UC to first focus on rough P-core parity with better area/power efficiency.
Geddagod@reddit (OP)
Even if the node causes a large perf/watt gap, by 18A-U, which Titan Lake might end up being on, they might be competitive for Fmax. After all, Intel has squeezed out high clocks eventually even on older nodes (Intel 7 vs N5, Intel 14nm vs N7), even if it's at the expense of power and area.
And if UC helps lower power and area via the uarch, that can also help cover for the worse perf/watt and density 18A itself has over N2.
Exist50@reddit
Seems unlikely. You're essentially asking for the second subnode revision to provide a full node's worth of perf scaling. Would expect more like 5% vs a ~15% gap.
I suppose two ways to look at it. A more power efficient core can mitigate a worse node in mobile, or a lower area core can mitigate the cost of a higher perf node.
CopperSharkk@reddit
Yeah maybe. Hopefully the 2nd gen in HML is a big uplift in ST.
Exist50@reddit
Yeah, I have faith in the team, but it's just a really tall order to completely obviate the P-core in one fell swoop. And more to the point, if they could do that, would be better to ship a more narrowly focused solution a gen earlier.
Geddagod@reddit (OP)
I'm assuming that they don't want any unified core/TTL CPU IP delays to impact their partnership with Nvidia. Just cutting down their already existing 8+16 RZL die sounds like a much safer option.
Or, if one wants to be very pessimistic, even unified core on 18A-P/U is worse than griffin core on N2P due to the node difference. And Intel wants to use their best CPU stuff with their Nvidia partnership. But I doubt that is the case.
Exist50@reddit
That 8+0 bLLC "RZL" product is interesting. Bit of an odd choice to pair the older CPU and worse node with bLCC. Maybe reuse from NVL bLLC, if that still exists? Seems like it could be a decent budget gaming part, if they can hit the right price point.
TTL construction is also pretty interesting. They label them differently, and the mainstream lineup doesn't have the 2Xe annotated that the B packages do (iGPU big.LITTLE?), but it almost looks like the hub dies are the same. Unless they're reusing it, not sure why they'd have such a robust media engine, unless they really* want it for P/PX. But I'm confused about the apparent overlap between TTL PX and B/BX. Or are these the Nvidia parts?
Dangerman1337@reddit
It is based on Panther Cove X and on 18A-P. But I hope we see 18A-U Coral Rapids 8P+0E tiles at least in the first half or Summer of 2028.
Exist50@reddit
Hmm, I don't think that would make sense. The server variant of PNC should be optimized for a lower VF cap in exchange for better power efficiency around Vmin. That's not a tradeoff that would make sense for a client desktop part, especially with bLLC in the picture.
Dangerman1337@reddit
True, but it's probably a seperate-ish project to offer a "budget" competitor to Zen 6/7 X3D since 8+16 NVL/RZL bLLC on TSMC N2P is very pricey to make. But as I said, an 18A-U tile would more suitable for such a tile.
CopperSharkk@reddit
Exist50@reddit
So my question is why this vs an 8+0 GFC N2P die? Even in gaming, I would think a node advantage + new core would win out against bLLC. But maybe the difference is narrow enough, and the price of N2P wafers high enough, for this to make sense. And clearly this is primarily a gaming SKU.
CopperSharkk@reddit
B/BX are the nvidia parts according to MLID. That's why the gpu box is blank I guess because it's not made by intel.
Geddagod@reddit (OP)
According to MLID, yes.